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上海配资Reference Flow

上海配资Reference Flow

SMIC offers multiple comprehensive reference flows based on different leading-edge EDA solutions. These reference flows enable customers to set up their own design environments and convert designs from RTL to GDSII with simple steps, significantly reducing the time to production.

These reference flows are jointly developed by SMIC's reference flow team and leading-edge EDA companies including Cadence, Synopsys, etc.

Currently, SMIC offers reference design flow services for logic designs and complex 0.13μm, 90nm, 65nm, 40nm and 28nm SoC designs based on different EDA vendor design environments. Reference design guidelines for the 0.11μm and 55nm half-node processes are also available from SMIC.

上海配资For specific information on reference design flows, please select from the menus below.

Document

Edition

 

28um

SMIC- Cadence Reference Flow 6.0

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SMIC- Synopsys Reference Flow 6.0

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40um

SMIC- Cadence Reference Flow 5.1

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SMIC- Synopsys Reference Flow 5.1

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65um

SMIC- Cadence Reference Flow 4.0

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SMIC- Synopsys Reference Flow 4.0

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90um

上海配资SMIC- Cadence Reference Flow 3.2

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SMIC- Synopsys Reference Flow 3.2

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0.13um

上海配资SMIC- Cadence Reference Flow 2.1

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SMIC- Synopsys Reference Flow 2.1

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